The present invention relates generally to monitoring data signals in printed circuit boards (PCBs) and, more particularly, to a technique for using a test point having a deposited resistor to buffer undesirable signal effects resulting from the test point and a probe connected thereto.
The capability to test circuits during the development phase often proves advantageous. Further, real-time testing during operation of the circuit often provides circuit designers and manufacturers sought-after feedback for verifying and improving circuit design. To this end, printed circuit boards (PCBs) and other circuit devices often are configured to include test points (also referred to as probe taps) for access to transmission lines in the circuit.
While providing the ability to monitor a transmission line signal, conventional test points often negatively affect the operation of the signal propagated along the transmission line. In most instances, conventional test points are implemented using a tap to provide a connection from the PCB surface to the embedded transmission line. The tap may include, for example, a surface pad for a microstrip transmission line or a via pad, a microvia or a through-hole via for an embedded stripline transmission line. The tap typically introduces a capacitance, referred to herein as Cvia, directly connected to the transmission line. This capacitance, in concert with the impedance of the probe and measurement device, functions as a low-pass filter thereby causing severe attenuation in the signal path. This signal loading is especially detrimental in high-speed digital signals. Even though the capacitance Cvia introduced by conventional taps often may be as low as 200 femtoFarads (fF), this relatively low capacitance, when combined with a data signal rate greater than 3 gigabits/second (Gb/s), typically results in unacceptable signal attenuation. This-problem becomes even more pronounced as high-speed digital signaling increases into the tens-of-gigabits range.
Further, such conventional taps using vias typically require clearance holes or antipads in the surface layer over the transmission line tracks. In the event that the via is located near the track, the antipad typically creates a small slot in the ground plane, which can cause perturbations in the data signal, such as voltage reflections due to the impedance discontinuity. On the other hand, if the via is relocated away from the track to minimize this effect, a transmission line stub may be created that further exacerbates the loading effect of the connected via.
A number of techniques have been developed in an attempt to minimize or eliminate signal attenuation during signal monitoring. One common technique includes using a surface mount (SMT) resistor between the circuit and the probe to minimize signal attenuation on the monitored digital signal path. The use of a SMT resistor or other discrete resistor poses a number of problems including: added impedance resulting from the solder joint used on the SMT resistor; a reduction in surface space; and untimely modifications to the circuit layout that may delay the release date of the circuit as well as affect its performance. SMT resistors also have significant inductance, which increases the high frequency attenuation in the monitored signal path.
Alternatively, the testing of the data signal may be deferred downstream at a point where the high-speed signal is demultiplexed to a lower frequency. This approach complicates troubleshooting in the event that errors are detected downstream as it may be difficult to pinpoint exactly where in the path the errors occur.
In view of the foregoing, it would be desirable to provide a technique for monitoring a transmission signal in a circuit that overcomes the above-described inadequacies and shortcomings. More particularly, it would be desirable to provide a technique for signal monitoring in circuits in an efficient and cost effective manner.
According to the present invention, a technique for monitoring data signals in circuits is provided. In one particular exemplary embodiment, the technique may be realized as a printed circuit board (PCB) comprising a transmission line deposited at a signal layer of the PCB for transmitting a data signal and a signal electrode for providing an electrical connection between the PCB and a probe of a signal monitor. The PCB further comprises a resistor deposited at the signal layer and being in electrical communication with the transmission line and the signal electrode, wherein the resistor is adapted to transmit an impeded signal from the transmission line to the signal electrode, the impeded signal being representative of the data signal. The PCB further may further comprise a microvia in electrical communication with the deposited resistor at the signal layer and the signal electrode and being adapted to transmit the impeded signal from the deposited resistor to the signal electrode. The PCB may also comprise a non-conductive gap between a substantial portion of the resistor and the transmission line, the gap providing an equalization capacitance between the transmission line and the signal electrode.
In another particular embodiment, the technique may be realized as a method for monitoring a data signal transmitted over a transmission line at a signal layer of a printed circuit board (PCB). The method comprises the steps of transmitting an electrical signal representative of the data signal from the transmission line to a signal electrode through a resistor deposited at the signal layer to generate an impeded signal. The method further comprises transmitting the impeded signal from the signal electrode to a signal monitor via a probe attached to the signal electrode. The step of transmitting the electrical signal may include transmitting the electrical signal through a deposited resistor having a non-conductive gap between a substantial portion of the deposited resistor and the transmission line to generate an equalization capacitance between the transmission line and the signal electrode.
The present invention will now be described in more detail with reference to exemplary embodiments thereof as shown in the appended drawings. While the present invention is described below with reference to preferred embodiments, it should be understood that the present invention is not limited thereto. Those of ordinary skill in the art having access to the teachings herein will recognize additional implementations, modifications, and embodiments, as well as other fields of use, which are within the scope of the present invention as disclosed and claimed herein, and with respect to which the present invention could be of significant utility.